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MC68HC705P6A Datasheet, PDF (20/130 Pages) Motorola, Inc – HCMOS Microcontroller Unit | |||
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General Description
available in either a 28-pin plastic dual in-line (PDIP) or a 28-pin small
outline integrated circuit (SOIC) package.
A functional block diagram of the MC68HC705P6A is shown in
Figure 1-1.
1.3 Features
Advance Information
20
Features of the MC68HC705P6A include:
⢠Low cost
⢠M68HC05 core
⢠28-pin SOIC, PDIP, or windowed DIP package
⢠4672 bytes of user EPROM (including 48 bytes of page zero
EPROM and 16 bytes of user vectors)
⢠239 bytes of bootloader ROM
⢠176 bytes of on-chip RAM
⢠4-channel 8-bit A/D converter
⢠SIOP serial communications port
⢠16-bit timer with output compare and input capture
⢠20 bidirectional I/O lines and 1 input-only line
⢠PC0 and PC1 high-current outputs
⢠Single-chip, bootloader, and test modes
⢠Power-saving stop, halt, and wait modes
⢠Static EPROM mask option register (MOR) selectable options:
â COP watchdog timer enable or disable
â Edge-sensitive or edge- and level-sensitive external interrupt
â SIOP most significant bit (MSB) or least significant bit (LSB)
first
â SIOP clock rates: OSC divided by 8, 16, 32, or 64
â Stop instruction mode, STOP or HALT
â EPROM security external lockout
â Programmable keyscan (pullups/interrupts) on PA0âPA7
General Description
MC68HC705P6A â Rev. 2.0
MOTOROLA
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