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MC9328MX21 Datasheet, PDF (68/106 Pages) Motorola, Inc – i.MX family of microprocessors
Specifications
(HCLK) Bus Clock
Address
Chip-select
Read (Write)
OE (rising edge)
OE (falling edge)
EB (rising edge)
EB (falling edge)
1a
2a
3a
4a
4c
5a
5c
1b
2b
3b
4b
4d
5b
5d
LBA (negated falling edge)
LBA (negated rising edge)
Burst Clock (rising edge)
Burst Clock (falling edge)
Read Data
Write Data (negated falling)
Write Data (negated rising)
DTACK
6a
6a
7a
7c
9a
9a
10a
6b
6c
7b
7d
8b
8a
9b
9c
10a
Figure 53. EIM Bus Timing Diagram
Table 41. EIM Bus Timing Parameters
Ref No.
Parameter
1.8V +/- 0.1V
3.0V +/- 0.3V
Unit
Min Typical Max Min Typical Max
1a
Clock fall to address valid
1b
Clock fall to address invalid
2a
Clock fall to chip-select valid
2b
Clock fall to chip-select invalid
3a
Clock fall to Read (Write) Valid
3.97 6.02 9.89 3.83 5.89
9.79
ns
3.93 6.00 9.86 3.81 5.86
9.76
ns
3.47 5.59 8.62 3.30 5.09
8.45
ns
3.39 5.09 8.27 3.15 4.85
8.03
ns
3.51 5.56 8.79 3.39 5.39
8.51
ns
MC9328MX21 Product Preview, Rev. 1.1
68
Freescale Semiconductor