MC9328MX21 Datasheet, PDF (52/106 Pages) Motorola, Inc – i.MX family of microprocessors

Specifications
Table 31. SDRAM Refresh Timing Parameter Table (Continued)
1.8V
3.0V +/-10%
Ref
No.
Parameter
Unit
Minimum Maximum Minimum Maximum
4 Address setup time
3.67
–
3
–
ns
5 Address hold time
2.95
–
2
–
ns
6 Precharge cycle period
t_RP1
–
t_RP1
–
ns
7 Auto precharge command period
t_RC1
–
t_RC1
–
ns
1. t_RP and t_RC = SDRAM clock cycle time. These settings can be found in the i.MX21 reference manual.
SDCLK
CS
RAS
CAS
WE
ADDR
BA
DQ
DQM
CKE
Figure 41. SDRAM Self-Refresh Cycle Timing Diagram
3.16 Synchronous Serial Interface
The transmit and receive sections of the SSI can be synchronous or asynchronous. In synchronous mode,
the transmitter and the receiver use a common clock and frame synchronization signal. In asynchronous
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