MC9328MX21 Datasheet, PDF (60/106 Pages) Motorola, Inc – i.MX family of microprocessors

Specifications
Table 35. SSI to SSI3 Ports Timing Parameter Table
1.8V +/- 0.10V
3.0V +/- 0.30V
Ref
No.
Parameter
Unit
Minimum Maximum Minimum Maximum
Internal Clock Operation¹ (SSI3 Ports)
1 (Tx/Rx) CK clock period¹
90.91
–
2 (Tx) CK high to FS (bl) high
-2.09
-0.66
3 (Rx) CK high to FS (bl) high
-2.74
-0.84
4 (Tx) CK high to FS (bl) low
-2.09
-0.66
5 (Rx) CK high to FS (bl) low
-2.74
-0.84
6 (Tx) CK high to FS (wl) high
-2.09
-0.66
7 (Rx) CK high to FS (wl) high
-2.74
-0.84
8 (Tx) CK high to FS (wl) low
-2.09
-0.66
9 (Rx) CK high to FS (wl) low
-2.74
-0.84
10 (Tx) CK high to STXD valid from high impedance
-1.73
-0.26
11a (Tx) CK high to STXD high
-2.87
-0.80
11b (Tx) CK high to STXD low
-2.87
-0.80
12 (Tx) CK high to STXD high impedance
-1.73
-0.26
13 SRXD setup time before (Rx) CK low
22.77
–
14 SRXD hold time after (Rx) CK low
0
–
90.91
-2.09
-2.74
-2.09
-2.74
-2.09
-2.74
-2.09
-2.74
-1.73
-2.87
-2.87
-1.73
22.77
0
–
ns
-0.66
ns
-0.84
ns
-0.66
ns
-0.84
ns
-0.66
ns
-0.84
ns
-0.66
ns
-0.84
ns
-0.26
ns
-0.80
ns
-0.80
ns
-0.26
ns
–
ns
–
ns
15 (Tx/Rx) CK clock period¹
16 (Tx/Rx) CK clock high period
17 (Tx/Rx) CK clock low period
18 (Tx) CK high to FS (bl) high
19 (Rx) CK high to FS (bl) high
20 (Tx) CK high to FS (bl) low
21 (Rx) CK high to FS (bl) low
22 (Tx) CK high to FS (wl) high
23 (Rx) CK high to FS (wl) high
External Clock Operation (SSI3 Ports)
90.91
36.36
36.36
9.62
10.30
9.62
10.30
9.62
10.30
–
–
–
17.10
19.54
17.10
19.54
17.10
19.54
90.91
36.36
36.36
7.90
8.58
7.90
8.58
7.90
8.58
–
ns
–
ns
–
ns
15.61
ns
18.05
ns
15.61
ns
18.05
ns
15.61
ns
18.05
ns
MC9328MX21 Product Preview, Rev. 1.1
60
Freescale Semiconductor