MC9328MX21 Datasheet, PDF (55/106 Pages) Motorola, Inc – i.MX family of microprocessors

Specifications
Table 32. SSI to SAP Ports Timing Parameter Table (Continued)
1.8V +/- 0.10V
3.0V +/- 0.30V
Ref
No.
Parameter
Unit
Minimum Maximum Minimum Maximum
4 (Tx) CK high to FS (bl) low
5 (Rx) CK high to FS (bl) low
6 (Tx) CK high to FS (wl) high
7 (Rx) CK high to FS (wl) high
8 (Tx) CK high to FS (wl) low
9 (Rx) CK high to FS (wl) low
10 (Tx) CK high to STXD valid from high impedance
11a (Tx) CK high to STXD high
11b (Tx) CK high to STXD low
12 (Tx) CK high to STXD high impedance
13 SRXD setup time before (Rx) CK low
14 SRXD hold time after (Rx) CK low
-3.30
-3.93
-3.30
-3.93
-3.30
-3.93
-2.44
-2.44
-2.44
-2.67
23.68
0
-1.16
-1.34
-1.16
-1.34
-1.16
-1.34
-0.60
-0.60
-0.60
-0.99
–
–
-2.98
-4.18
-2.98
-4.18
-2.98
-4.18
-2.65
-2.65
-2.65
-2.65
22.09
0
-1.10
ns
-1.43
ns
-1.10
ns
-1.43
ns
-1.10
ns
-1.43
ns
-0.98
ns
-0.98
ns
-0.98
ns
-0.98
ns
–
ns
–
ns
External Clock Operation (SAP Ports)
15 (Tx/Rx) CK clock period¹
90.91
–
16 (Tx/Rx) CK clock high period
36.36
–
17 (Tx/Rx) CK clock low period
36.36
–
18 (Tx) CK high to FS (bl) high
10.24
19.50
19 (Rx) CK high to FS (bl) high
10.89
21.27
20 (Tx) CK high to FS (bl) low
10.24
19.50
21 (Rx) CK high to FS (bl) low
10.89
21.27
22 (Tx) CK high to FS (wl) high
10.24
19.50
23 (Rx) CK high to FS (wl) high
10.89
21.27
24 (Tx) CK high to FS (wl) low
10.24
19.50
25 (Rx) CK high to FS (wl) low
10.89
21.27
26 (Tx) CK high to STXD valid from high impedance
12.08
19.36
27a (Tx) CK high to STXD high
10.80
19.36
90.91
36.36
36.36
7.16
7.63
7.16
7.63
7.16
7.63
7.16
7.63
7.71
7.71
–
ns
–
ns
–
ns
8.65
ns
9.12
ns
8.65
ns
9.12
ns
8.65
ns
9.12
ns
8.65
ns
9.12
ns
9.20
ns
9.20
ns
MC9328MX21 Product Preview, Rev. 1.1
Freescale Semiconductor
55