MC9328MX21 Datasheet, PDF (51/106 Pages) Motorola, Inc – i.MX family of microprocessors

Specifications
Table 30. SDRAM Write Timing Parameter Table (Continued)
1.8V
3.0V +/-10%
Ref
No.
Parameter
Unit
Minimum Maximum Minimum Maximum
9 Data hold time
2.45
–
2
–
ns
1. Precharge cycle timing is included in the write timing diagram.
2. t_RP and t_RCD = SDRAM clock cycle time. These settings can be found in the i.MX21 reference manual.
SDCLK
CS
13
2
RAS
6
CAS
WE
4
5
ADDR
BA
DQ
7
7
ROW/BA
DQM
Figure 40. SDRAM Refresh Timing Diagram
Table 31. SDRAM Refresh Timing Parameter Table
1.8V
3.0V +/-10%
Ref
No.
Parameter
Unit
Minimum Maximum Minimum Maximum
1 SDRAM clock high-level width
2 SDRAM clock low-level width
3 SDRAM clock cycle time
3.00
–
4
–
ns
3.00
–
4
–
ns
11.1
–
7.5
–
ns
MC9328MX21 Product Preview, Rev. 1.1
Freescale Semiconductor
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