XPC850ZT50BU Datasheet, PDF (44/76 Pages) Motorola, Inc – Communications Controller Hardware Specifications

PIO AC Electrical Specifications
8.1 PIO AC Electrical Specifications
Table 8-13 provides the parallel I/O timings for the MPC850 as shown in Figure 8-38.
Table 8-13. Parallel I/O Timing
Num
Characteristic
29 Data-in setup time to clock high
30 Data-in hold time from clock high
31 Clock low to data-out valid (CPU writes data, control, or direction)
All Frequencies
Unit
Min
Max
15
—
ns
7.5
—
ns
—
25
ns
CLKOUT
DATA-IN
29
30
31
DATA-OUT
Figure 8-38. Parallel I/O Data-In/Data-Out Timing Diagram
8.2 IDMA Controller AC Electrical Specifications
Table 8-14 provides the IDMA controller timings as shown in Figure 8-39 to Figure 8-42.
Table 8-14. IDMA Controller Timing
Num
Characteristic
40 DREQ setup time to clock high
41 DREQ hold time from clock high
42 SDACK assertion delay from clock high
43 SDACK negation delay from clock low
44 SDACK negation delay from TA low
45 SDACK negation delay from clock high
46 TA assertion to falling edge of the clock setup time (applies to external TA)
All Frequencies
Unit
Min
Max
7.00
—
ns
3.00
—
ns
—
12.00 ns
—
12.00 ns
—
20.00 ns
—
15.00 ns
7.00
—
ns
44
MPC850 (Rev. A/B/C) Hardware Specifications
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