XPC850ZT50BU Datasheet, PDF (41/76 Pages) Motorola, Inc – Communications Controller Hardware Specifications

Layout Practices
Figure 6-32 provides the reset timing for the data bus weak drive during configuration.
CLKOUT
R69
HRESET
R79
RSTCONF
R77
R78
D[0:31] (OUT)
(Weak)
Figure 6-32. Reset Timing—Data Bus Weak Drive during Configuration
Figure 6-33 provides the reset timing for the debug port configuration.
CLKOUT
SRESET
DSCK, DSDI
R70
R80
R81
R82
R80
R81
Figure 6-33. Reset Timing—Debug Port Configuration
MOTOROLA
MPC850 (Rev. A/B/C) Hardware Specifications
41