XPC850ZT50BU Datasheet, PDF (31/76 Pages) Motorola, Inc – Communications Controller Hardware Specifications

Layout Practices
CLKOUT
B37
UPWAIT
B38
CSx
BS_A[0:3],
BS_B[0:3]
GPL_A[0—5],
GPL_B[0—5]
Figure 6-17. Asynchronous UPWAIT Asserted Detection in UPM Handled Cycles
Timing
Figure 6-18 provides the timing for the asynchronous negated UPWAIT signal controlled
by the UPM.
CLKOUT
UPWAIT
CSx
B37
B38
BS_A[0:3],
BS_B[0:3]
GPL_A[0—5],
GPL_B[0—5]
Figure 6-18. Asynchronous UPWAIT Negated Detection in UPM Handled Cycles
Timing
Figure 6-19 provides the timing for the synchronous external master access controlled by
the GPCM.
MOTOROLA
MPC850 (Rev. A/B/C) Hardware Specifications
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