MC68HC908RK2 Datasheet, PDF (33/232 Pages) Motorola, Inc – Microcontroller Unit

Memory Map
Input/Output Section
$FE0E
BREAK STATUS AND CONTROL REGISTER (BSCR)
$FE0F
LVI STATUS REGISTER (LVISR)
$FE10
↓
$FEEF
UNIMPLEMENTED (222 BYTES)
$FEF0
↓
$FEFF
MONITOR ROM (16 BYTES)
$FF00
↓
$FFEF
UNIMPLEMENTED (240 BYTES)
$FFF0
FLASH BLOCK PROTECT REGISTER (FLBPR)
$FFF1
RESERVED (1 BYTE)
$FFF2
↓
$FFFF
FLASH VECTORS
(14 Bytes)
Figure 2-1. Memory Map (Continued)
2.3 Input/Output Section
Addresses $0000–$003F, shown in Figure 2-2, contain most of the
control, status, and data registers. Additional I/O registers have these
addresses:
• $FE00 — SIM break status register, SBSR
• $FE01 — SIM reset status register, SRSR
• $FE02 — SIM break flag control register, BFCR
• $FE08 — FLASH control register, FLCR
• $FE0C — BREAK address register high, BRKH
• $FE0D — BREAK address register low, BRKL
• $FE0E — BREAK status and control register, BSCR
• $FE0F — LVI status register, LVISR
• $FFF0 — FLASH block protection register, FLBPR
• $FFFF — COP control register, COPCTL
MC68HC908RK2 — Rev. 4.0
MOTOROLA
Memory Map
Advance Information
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