MC68HC908RK2 Datasheet, PDF (120/232 Pages) Motorola, Inc – Microcontroller Unit

Internal Clock Generator Module (ICG)
8.4.5 Clock Selection Circuit
The clock selection circuit, shown in Figure 8-5, contains two clock
switches which generate the oscillator output clock (CGMXCLK) from
either the internal clock (ICLK) or the external clock (ECLK). The clock
selection circuit also contains a divide-by-two circuit which creates the
clock generator output clock (CGMOUT), which generates the bus
clocks.
CS
ICLK
ECLK
IOFF
EOFF
RESET
V_SS
SELECT
ICLK
ECLK
IOFF
EOFF
FORCE_I
FORCE_E
OUTPUT
SYNCHRONIZING
DIV2
CLOCK
SWITCHER
CGMXCLK
CGMOUT
NAME
TOP LEVEL SIGNAL
NAME
NAME
REGISTER BIT
MODULE SIGNAL
Figure 8-5. Clock Selection Circuit Block Diagram
8.4.5.1 Clock Selection Switch
The clock select switch creates the oscillator output clock (CGMXCLK)
from either the internal clock (ICLK) or the external clock (ECLK), based
on the clock select bit (CS; set selects ECLK, clear selects ICLK). When
switching the CS bit, both ICLK and ECLK must be on (ICGON and
ECGON set). The clock being switched to must also be stable (ICGS or
ECGS set).
Advance Information
120
Internal Clock Generator Module (ICG)
MC68HC908RK2 — Rev. 4.0
MOTOROLA