MC68HC908RK2 Datasheet, PDF (214/232 Pages) Motorola, Inc – Microcontroller Unit

Timer Interface Module (TIM)
Table 15-3. Mode, Edge, and Level Selection
MSxB:MSxA
X0
X1
00
00
00
01
01
01
1X
1X
1X
ELSxB:ELSxA
00
00
01
10
11
01
10
11
01
10
11
Mode
Output preset
Input capture
Output
compare or
PWM
Buffered output
compare or
buffered PWM
Configuration
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or
falling edge
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
NOTE: Before enabling a TIM channel register for input capture operation, make
sure that the PTB/TCHx pin is stable for at least two bus clocks.
TOVx — Toggle On Overflow Bit
When channel x is an output compare channel, this read/write bit
controls the behavior of the channel x output when the TIM counter
overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
CHxMAX — Channel x Maximum Duty Cycle Bit
When the TOVx bit is at logic 1 and clear output on compare is
selected, setting the CHxMAX bit forces the duty cycle of buffered and
unbuffered PWM signals to 100 percent. As Figure 15-8 shows, the
Advance Information
214
Timer Interface Module (TIM)
MC68HC908RK2 — Rev. 4.0
MOTOROLA