MC68HC908RK2 Datasheet, PDF (125/232 Pages) Motorola, Inc – Microcontroller Unit

Internal Clock Generator Module (ICG)
Usage Notes
8.5.3 Clock Monitor Interrupts
The clock monitor circuit can be used to recover from perilous situations
such as crystal loss. To use the clock monitor effectively, these notes
should be observed:
• Enable the clock monitor and clock monitor interrupts.
• The first statement in the clock monitor interrupt service routine
should be a read to the ICG control register (ICGCR) to verify that
the clock monitor flag (CMF) is set. This is also the first step in
clearing the CMF bit.
• Never use BSET or BCLR instructions on the ICGCR, as this may
inadvertently clear CMF. Only use the BRSET and BRCLR
instructions to check the CMF bit and not to check any other bits
in the ICGCR.
• When the clock monitor detects inactivity on the selected clock
source (defined by the CS bit of the ICG control register), the
inactive clock is deselected automatically and the remaining active
clock is selected as the source for CGMXCLK. The interrupt
service routine can use the state of the CS bit to check which clock
is inactive.
• When the clock monitor detects inactivity, the application may
have been subjected to extreme conditions which may have
affected other circuits. The clock monitor interrupt service routine
should take any appropriate precautions.
8.5.4 Quantization Error in DCO Output
The digitally controlled oscillator (DCO) is comprised of three major sub-
blocks:
1. Binary weighted divider
2. Variable-delay ring oscillator
3. Ring oscillator fine-adjust circuit
Each of these blocks affects the clock period of the internal clock (ICLK).
Since these blocks are controlled by the digital loop filter (DLF) outputs
MC68HC908RK2 — Rev. 4.0
MOTOROLA
Internal Clock Generator Module (ICG)
Advance Information
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