SDA9380-B21 Datasheet, PDF (67/72 Pages) Micronas – EDDC Enhanced Deflection Controller and RGB Processor

SDA 9380 - B21
11.3 Power On/Off diagram
Preliminary Data Sheet
Waveforms
Supply ^{max. 2.6V}
Voltage
Power-
On-
Reset
X1, X2
32768
cycles
SSD=0: ~ 8 lines
SSD=1: ~12 lines
HD
min. 1.5V
32768
cycles
SSD=0: ~ 8 lines
SSD=1: ~12 lines
I²C-Bus tristate
IIC registers 01..1C
programmable
ready
tri-
state
IIC registers 01..1C
programmable
ready
tristate
VREFH
Protection ^active
(HPROT _inactive
>1.5V)
I²C-Reg.
de-
00, 1D..30h ^fault
programmable
de-
fault
programmable
de-
fault
I²C-Reg.
01..1C
default
programmable
default
programmable
de-
fault
CLL
CPU
active
inactive
~ 42 cycles
power on
glitch
power off
Micronas
11-59
2001-01-29