SDA9380-B21 Datasheet, PDF (65/72 Pages) Micronas – EDDC Enhanced Deflection Controller and RGB Processor

SDA 9380 - B21
11 Waveforms
11.1 Timing diagram of H35K and H38K
Preliminary Data Sheet
Waveforms
f_H at
HSYNC
f _Hat HD
H35K
H38K
31 kHz ^fTH1
35 kHz ^fTH3
38 kHz
f_{TH4 35 kHz}
f _TH2
31 kHz
31 kHz
35 kHz
38 kHz
35 kHz
**)
**)
31 kHz
t_D1
*)
*)
t_D3
*)
*)
*) new H-frequency detected
**) depends on decrease of B+
11.2 Black Switch-Off diagrams
BSOIN
VBL com-
ponent of
SCP
VD+
ROUT,
BOUT,
GOUT
V_TH
ca. 20% V_TH
t _D1
overscan depends on selected BSO mode (s. next page)
BSOIN controls VD+, VD- in mode 2, 3
t_D2
HD
continuously HD pulses until Power-On-Reset is going High
t_D1: 2...2.5 lines
t_D2: 42 lines
Micronas
11-57
2001-01-29