SDA9380-B21 Datasheet, PDF (41/72 Pages) Micronas – EDDC Enhanced Deflection Controller and RGB Processor

SDA 9380 - B21
Preliminary Data Sheet
System description
HSYNC
VSYNC
VD-
A
1
2
20 21 22 23 24 25 26 27 28 29 30 31 32
1 line
start of
odd field
start of even field
VBL
(default:
BSE=0,
VBS=0)
VBL
(BSE=0,
VBS=2)
2 lines
VBL
(BSE=0,
VBS=0,
VBE=1)
R
GB
29 lines
RGB
R
GB
31 lines
RGB
R
GB
30 lines
RGB
odd field
even field
odd field
even field
odd field
even field
Internal vertical blanking pulse VBL when JMP = 1 and number of lines per field = constant
Micronas
5-33
2001-01-29