MT40A1G4RH-083E Datasheet, PDF (338/365 Pages) Micron Technology – 4Gb: x4, x8, x16 DDR4 SDRAM

4Gb: x4, x8, x16 DDR4 SDRAM
Refresh Parameters By Device Density
Table 155: DDR4-3200 Speed Bins and Operating Conditions (Continued)
DDR4-3200 Speed Bin
CL-nRCD-nRP
Parameter
Supported CWL settings
-062F
-062E
-062
20-20-20
22-22-22
24-24-24
Symbol Min
Max
Min
Max
Min
Max Unit
9, 10, 11, 12, 14, 16, 9, 10, 11, 12, 14, 16, 9, 10, 11, 12, 14, 16, nCK
18, 20
18, 20
18, 20
Notes:
1. Speed Bin table is only valid with DLL enabled and gear-down mode disabled.
2. When operating in 2^tCK WRITE preamble mode, CWL must be programmed to a value
at least 1 clock greater than the lowest CWL setting supported in the applicable ^tCK
range.
3. The programmed value of CWL must be less than or equal to programmed value of CL.
4. ^tCK (AVG) MIN.
5. The DRAM requires 13.5ns for CL9 operation; JEDEC doesn't require CL9 support for a
CL22 device.
6. If the clock period is less than 0.938ns and greater than or equal to 0.937ns, timing pa-
rameters that are derived off the clock will use 0.938ns as its reference. For example, if
t_{CK (MIN) = 0.938ns and} t_{RP = 14.06ns, then} t_{RP would require 15nCKs (14.06ns/}
0.938ns), but if ^tCK (MIN) = 0.937ns and ^tRP = 14.06ns, then ^tRP would still require
15nCKs (14.06ns/ 0.938ns) and not 16nCKs (14.06ns/ 0.937ns).
7. When calculating ^tRC and ^tRP in clocks, values may not be used in such a combination
that would violate ^tRAS.
Refresh Parameters By Device Density
Table 156: Refresh Parameters by Device Density
Parameter
REF command to ACT or REF com-
mand time
Average periodic refresh interval
Symbol
t_{RFC (All bank groups)}
t_REFI
0°C ≤ T_C ≤ 85°C
0°C < T_C ≤ 95°C
2Gb
160
7.8
3.9
4Gb
260
7.8
3.9
8Gb
350
7.8
3.9
16Gb
550
Unit Notes
ns
7.8
μs
3.9
μs
1
Note: 1. Users should refer to the DRAM supplier data sheet and/or the DIMM SPD to determine
if the devices support these options or requirements.
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4gb_ddr4_dram.pdf - Rev. G 1/17 EN
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