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MT40A1G4RH-083E Datasheet, PDF (301/365 Pages) Micron Technology – 4Gb: x4, x8, x16 DDR4 SDRAM
4Gb: x4, x8, x16 DDR4 SDRAM
Electrical Characteristics – On-Die Termination Characteristics
2. Micron recommends calibrating pull-up ODT resistors at 0.8 × VDDQ. Other calibration
schemes may be used to achieve the linearity specification shown here.
3. The tolerance limits are specified under the condition that VDDQ = VDD and VSSQ = VSS.
4. The DQ-to-DQ mismatch within byte variation for a given component including DQS_t
and DQS_c.
5. RTT variance range ratio to RTT nominal value in a given component, including DQS_t
and DQS_c.
DQ-to-DQ mismatch = RTT(MAX) - RTT(MIN) × 100
RTT(NOM)
6. DQ-to-DQ mismatch for a x16 device is treated as two separate bytes.
7. For IT, AT, and UT devices, the minimum values are derated by 9% when the device op-
erates between –40°C and 0°C (TC).
ODT Temperature and Voltage Sensitivity
If temperature and/or voltage change after calibration, the tolerance limits widen ac-
cording to the following equations and tables.
ΔT = T - T(@ calibration); ΔV = VDDQ - VDDQ(@ calibration); VDD = VDDQ
Table 128: ODT Sensitivity Definitions
Parameter
RTT@
Min
0.9 - dRTTdT × |ΔT| - dRTTdV × |ΔV|
Max
1.6 + dRTTdTH × |ΔT| + dRTTdVH × |ΔV|
Unit
RZQ/n
Table 129: ODT Voltage and Temperature Sensitivity
Parameter
dRTTdT
dRTTdV
Min
0
0
Max
1.5
0.15
Unit
%/°C
%/mV
ODT Timing Definitions
The reference load for ODT timings is different than the reference load used for timing
measurements.
Figure 237: ODT Timing Reference Load
CK_t, CK_c
VDDQ
DUT
DQ, DQS_t, DQS_c,
DM, TDQS_t, TDQS_c
RTT = 50ȍ
VSSQ
Timing reference point
VTT = VSSQ
ODT Timing Definitions and Waveforms
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4gb_ddr4_dram.pdf - Rev. G 1/17 EN
301
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