N25Q128A11B1241F Datasheet, PDF (140/185 Pages) Micron Technology – 128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

Instructions
N25Q128 - 1.8 V
Figure 79. Quad Command Page Program instruction sequence QIO-SPI, 02h
S
Mode 3
C _{Mode 0}
DQ0
515 517 519
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 514 516 518
24-bit address
20 16 12 8 4 0
1
40
Data In
2
3
4040
4
40
Data In
254 255
4040
256
40
DQ1
21 17 13 9 5 1 5 1 5 1 5 1 5 1
5151 51
DQ2
22 18 14 10 6 2 6 2 6 2 6 2 6 2
6 262 62
DQ3
23 19 15 11 7 3 7 3 7 3 7 3 7 3
MSB MSB MSB
7373 73
MSB MSB MSB
Quad_Command_Page_Program_02h
Figure 80. Quad Command Page Program instruction sequence QIO-SPI, 12h
S
Mode 3
C _{Mode 0}
DQ0
515 517 519
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 514 516 518
24-bit address
20 16 12 8 4 0
1
40
Data In
2
3
4040
4
40
Data In
254 255
4040
256
40
DQ1
21 17 13 9 5 1 5 1 5 1 5 1 5 1
5151 51
DQ2
22 18 14 10 6 2 6 2 6 2 6 2 6 2
6 262 62
DQ3
23 19 15 11 7 3 7 3 7 3 7 3 7 3
MSB MSB MSB
7373 73
MSB MSB MSB
Quad_Command_Page_Program_12h
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