N25Q128A11B1241F Datasheet, PDF (109/185 Pages) Micron Technology – 128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

N25Q128 - 1.8 V
Instructions
S
C
DQ0
DQ1
9.1.31
Figure 38. Read Volatile Configuration Register instruction sequence
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Instruction
High Impedance
Volatile Configuration
Register Out
Volatile Configuration
Register Out
76543210765432107
MSB
MSB
Read_VCR
Write Volatile Configuration Register
The Write Volatile Configuration register (WRVCR) instruction allows new values to be
written to the Volatile Configuration register. Before it can be accepted, a write enable
(WREN) instruction must have been executed. After the write enable (WREN) instruction
has been decoded and executed, the device sets the write enable latch (WEL).
In case of Fast POR (see section 11.1 for further details) the WREN instruction is not
required because a WREN instruction gets the device out from the Fast POR state.
The Write Volatile Configuration register (WRVCR) instruction is entered by driving Chip
Select (S) Low, followed by the instruction code and the data byte on serial data input
(DQ0).
Chip Select (S) must be driven High after the eighth bit of the data byte has been latched in.
If not, the Write Volatile Configuration register (WRVCR) instruction is not executed.
When the new data are latched, the write enable latch (WEL) is reset.
The Write Volatile Configuration register (WRVCR) instruction allows the user to change the
values of all the Volatile Configuration Register bits, described in Table 6.: Volatile
Configuration Register.
The Write Volatile Configuration Register impacts the memory behavior right after the
instruction is received by the device.
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