N25Q128A11B1241F Datasheet, PDF (129/185 Pages) Micron Technology – 128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface

N25Q128 - 1.8 V
Instructions
Figure 66. Read Volatile Configuration Register instruction sequence DIO-SPI
S
0 1 2 3 4 5 6 7 8 9 10 11
C
Instruction
Volatile Configuration
Register Out
Byte
Byte
DQ0
6420 6420
9.2.22
DQ1
7531 7531
Dual_Read_VCR
Write Volatile Configuration Register
The Write Volatile Configuration register (WRVCR) instruction allows new values to be
written to the Volatile Configuration register. Before it can be accepted, a write enable
(WREN) instruction must have been executed previously. In case of Fast POR, the WREN
instruction is not required because a WREN instruction gets the device out from the Fast
POR state (See Section 11.1: Fast POR).
Apart form the parallelizing of the instruction code and the input data on the two pins DQ0
and DQ1, the instruction functionality is exactly the same as the Write Volatile Configuration
Register (WVCR) instruction of the Extended SPI protocol, please refer to Section 9.1.31:
Write Volatile Configuration Register for further details.
Figure 67. Write Volatile Configuration Register instruction sequence DIO-SPI
S
0 1 2 3 4 5 6 7 8 9 10 11
C
Instruction
Volatile Configuration
Register In
Byte
Byte
DQ0
6420 6420
DQ1
7531 7531
Dual_Write_VCR
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