PIC24FV16KM204 Datasheet, PDF (81/336 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontroller with XLP Technology Data Sheet

PIC24FV16KM204 FAMILY
REGISTER 7-1: RCON: RESET CONTROL REGISTER⁽¹⁾ (CONTINUED)
bit 4
WDTO: Watchdog Timer Time-out Flag bit
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
bit 3
SLEEP: Wake-up from Sleep Flag bit
1 = Device has been in Sleep mode
0 = Device has not been in Sleep mode
bit 2
IDLE: Wake-up from Idle Flag bit
1 = Device has been in Idle mode
0 = Device has not been in Idle mode
bit 1
BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred (the BOR is also set after a POR)
0 = A Brown-out Reset has not occurred
bit 0
POR: Power-on Reset Flag bit
1 = A Power-up Reset has occurred
0 = A Power-up Reset has not occurred
Note 1:
2:
3:
All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the FWDTENx Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled regardless of the
SWDTEN bit setting.
This is implemented on PIC24FV16KMXXX parts only; not used on PIC24F16KMXXX devices.
TABLE 7-1: RESET FLAG BIT OPERATION
Flag Bit
Setting Event
TRAPR (RCON<15>)
IOPUWR (RCON<14>)
CM (RCON<9>)
Trap Conflict Event
Illegal Opcode or Uninitialized W Register Access
Configuration Mismatch Reset
EXTR (RCON<7>)
MCLR Reset
SWR (RCON<6>)
RESET Instruction
WDTO (RCON<4>)
WDT Time-out
SLEEP (RCON<3>)
PWRSAV #SLEEP Instruction
IDLE (RCON<2>)
PWRSAV #IDLE Instruction
BOR (RCON<1>)
POR, BOR
POR (RCON<0>)
POR
Note: All Reset flag bits may be set or cleared by the user software.
Clearing Event
POR
POR
POR
POR
POR
PWRSAV Instruction, POR
POR
POR
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 2013 Microchip Technology Inc.
Advance Information
DS33030A-page 81