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PIC24FV16KM204 Datasheet, PDF (122/336 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontroller with XLP Technology Data Sheet
PIC24FV16KM204 FAMILY
9.1 CPU Clocking Scheme
The system clock source can be provided by one of
four sources:
• Primary Oscillator (POSC) on the OSCI and OSCO
pins
• Secondary Oscillator (SOSC) on the SOSCI and
SOSCO pins
The PIC24FV16KM204 family devices consist of
two types of secondary oscillator:
- High-Power Secondary Oscillator
- Low-Power Secondary Oscillator
These can be selected by using the SOSCSEL
(FOSC<5>) bit.
• Fast Internal RC (FRC) Oscillator
- 8 MHz FRC Oscillator
- 500 kHz Lower Power FRC Oscillator
• Low-Power Internal RC (LPRC) Oscillator with two
modes:
- High-Power/High-Accuracy mode
- Low-Power/Low-Accuracy mode
The primary oscillator and 8 MHz FRC sources have the
option of using the internal 4x PLL. The frequency of the
FRC clock source can optionally be reduced by the pro-
grammable clock divider. The selected clock source
generates the processor and peripheral clock sources.
The processor clock source is divided by two to produce
the internal instruction cycle clock, FCY. In this
document, the instruction cycle clock is also denoted by
FOSC/2. The internal instruction cycle clock, FOSC/2, can
be provided on the OSCO I/O pin for some operating
modes of the primary oscillator.
9.2 Initial Configuration on POR
The oscillator source (and operating mode) that is used
at a device Power-on Reset (POR) event is selected
using Configuration bit settings. The Oscillator
Configuration bit settings are located in the
Configuration registers in the program memory (for
more information, see Section 26.1 “Configuration
Bits”). The Primary Oscillator Configuration bits,
POSCMD<1:0> (FOSC<1:0>), and the Initial Oscillator
Select
Configuration
bits,
FNOSC<2:0>
(FOSCSEL<2:0>), select the oscillator source that is
used at a POR. The FRC Primary Oscillator with
Postscaler (FRCDIV) is the default (unprogrammed)
selection. The secondary oscillator, or one of the
internal oscillators, may be chosen by programming
these bit locations. The EC mode Frequency Range
Configuration bits, POSCFREQ<1:0> (FOSC<4:3>),
optimize power consumption when running in EC
mode. The default configuration is “frequency range is
greater than 8 MHz”.
The Configuration bits allow users to choose between
the various clock modes, shown in Table 9-1.
9.2.1
CLOCK SWITCHING MODE
CONFIGURATION BITS
The FCKSMx Configuration bits (FOSC<7:6>) are
used jointly to configure device clock switching and the
FSCM. Clock switching is enabled only when FCKSM1
is programmed (‘0’). The FSCM is enabled only when
FCKSM<1:0> are both programmed (‘00’).
TABLE 9-1: CONFIGURATION BIT VALUES FOR CLOCK SELECTION
Oscillator Mode
Oscillator Source POSCMD<1:0>
8 MHz FRC Oscillator with Postscaler (FRCDIV)
Internal
11
500 kHz FRC Oscillator with Postscaler
(LPFRCDIV)
Internal
11
Low-Power RC Oscillator (LPRC)
Internal
11
Secondary (Timer1) Oscillator (SOSC)
Secondary
00
Primary Oscillator (HS) with PLL Module (HSPLL)
Primary
10
Primary Oscillator (EC) with PLL Module (ECPLL)
Primary
00
Primary Oscillator (HS)
Primary
10
Primary Oscillator (XT)
Primary
01
Primary Oscillator (EC)
Primary
00
8 MHz FRC Oscillator with PLL Module (FRCPLL)
Internal
11
8 MHz FRC Oscillator (FRC)
Internal
11
Note 1: The OSCO pin function is determined by the OSCIOFNC Configuration bit.
2: This is the default oscillator mode for an unprogrammed (erased) device.
FNOSC<2:0>
111
110
101
100
011
011
010
010
010
001
000
Notes
1, 2
1
1
1
1
1
DS33030A-page 122
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