PIC24FV16KM204 Datasheet, PDF (327/336 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontroller with XLP Technology Data Sheet

PIC24FV16KM204 FAMILY
O
On-Chip Voltage Regulator .............................................. 257
Oscillator Configuration
Clock Switching ........................................................ 127
Sequence ......................................................... 127
Configuration Bit Values for Clock Selection ........... 122
Control Registers ..................................................... 123
CPU Clocking Scheme ............................................ 122
Initial Configuration on POR .................................... 122
Reference Clock Output ........................................... 128
P
Packaging
Details ...................................................................... 300
Marking .................................................................... 297
Power-Saving ................................................................... 135
Power-Saving Features ................................................... 131
Clock Frequency, Clock Switching ........................... 131
Coincident Interrupts ................................................ 132
Instruction-Based Modes ......................................... 131
Idle ................................................................... 132
Sleep ................................................................ 131
Retention Regulator (RETREG) ............................... 134
Selective Peripheral Control .................................... 135
Ultra Low-Power Wake-up ....................................... 132
Voltage Regulator-Based ......................................... 134
Retention Sleep Mode ..................................... 134
Run Mode ........................................................ 134
Sleep Mode ...................................................... 134
Product Identification System .......................................... 332
Program and Data Memory
Access Using Table Instructions ................................ 65
Program Space Visibility ............................................ 66
Program and Data Memory Spaces
Interfacing, Addressing .............................................. 63
Program Memory
Address Space ........................................................... 41
Configuration Word Addresses .................................. 42
Program Space
Memory Map .............................................................. 41
Program Verification ........................................................ 259
R
Reader Response ............................................................ 331
Register Maps
ADC ........................................................................... 59
ANSEL ....................................................................... 60
Band Gap Buffer Control ............................................ 61
CLC1-2 ....................................................................... 48
Clock Control ............................................................. 62
Comparator ................................................................ 61
CPU Core ................................................................... 45
CTMU ......................................................................... 60
DAC1 ......................................................................... 56
DAC2 ......................................................................... 56
ICN ............................................................................. 46
Interrupt Controller ..................................................... 47
MCCP1 ...................................................................... 49
MCCP2 ...................................................................... 50
MCCP3 ...................................................................... 51
MSSP1 (I²C/SPI) ....................................................... 54
MSSP2 (I²C/SPI) ....................................................... 54
NVM ........................................................................... 62
Op Amp 1 ................................................................... 56
Op Amp 2 ................................................................... 56
Pad Configuration ...................................................... 58
PMD ........................................................................... 62
PORTA ...................................................................... 57
PORTB ...................................................................... 57
PORTC ...................................................................... 57
Real-Time Clock and Calendar ................................. 60
SCCP4 ....................................................................... 52
SCCP5 ....................................................................... 53
Timer1 ....................................................................... 48
UART1 ....................................................................... 55
UART2 ....................................................................... 55
Ultra Low-Power Wake-up ......................................... 62
Registers
AD1CHITH (A/D Scan Compare Hit,
High Word) ...................................................... 219
AD1CHITL (A/D Scan Compare Hit, Low Word) ..... 220
AD1CHS (A/D Sample Select) ................................ 218
AD1CON1 (A/D Control 1) ....................................... 213
AD1CON2 (A/D Control 2) ....................................... 215
AD1CON3 (A/D Control 3) ....................................... 216
AD1CON5 (A/D Control 5) ....................................... 217
AD1CSSH (A/D Input Scan Select, High Word) ...... 221
AD1CSSL (A/D Input Scan Select, Low Word) ....... 221
AD1CTMENH (CTMU Enable, High Word) ............. 222
AD1CTMENL (CTMU Enable, Low Word) ............... 222
ALCFGRPT (Alarm Configuration) .......................... 186
ALMINSEC (Alarm Minutes and
Seconds Value) ............................................... 190
ALMTHDY (Alarm Month and Day Value) ............... 189
ALWDHR (Alarm Weekday and Hours Value) ........ 189
AMPxCON (Op Amp x Control) ............................... 234
ANSA (Analog Selection, PORTA) .......................... 138
ANSB (Analog Selection, PORTB) .......................... 139
ANSC (Analog Selection, PORTC) .......................... 139
CCPxCON1H (CCPx Control 1 High) ...................... 151
CCPxCON1L (CCPx Control 1 Low) ....................... 149
CCPxCON2H (CCPx Control 2 High) ...................... 154
CCPxCON2L (CCPx Control 2 Low) ....................... 153
CCPxCON3H (CCPx Control 3 High) ...................... 156
CCPxCON3L (CCPx Control 3 Low) ....................... 155
CCPxSTATL (CCPx Status) .................................... 157
CLCxCONH (CLCx Control High) ............................ 199
CLCxCONL (CLCx Control Low) ............................. 198
CLCxGLSL (CLCx Gate Logic Input Select High) ... 204
CLCxGLSL (CLCx Gate Logic Input Select Low) .... 202
CLCxMUX (CLCx Input MUX Select) ...................... 200
CLKDIV (Clock Divider) ........................................... 125
CMSTAT (Comparator Status) ................................ 238
CMxCON (Comparator x Control) ........................... 237
CORCON (CPU Control) ........................................... 39
CORCON (CPU Core Control) .................................. 90
CTMUCON1H (CTMU Control 1 High) .................... 246
CTMUCON1L (CTMU Control 1 Low) ..................... 244
CTMUCON2L (CTMU Control 2 Low) ..................... 248
CVRCON (Comparator Voltage
Reference Control) .......................................... 240
DACxCON (DACx Control) ...................................... 230
DEVID (Device ID) ................................................... 255
DEVREV (Device Revision) ..................................... 256
FBS (Boot Segment Configuration) ......................... 249
FGS (General Segment Configuration) ................... 250
FICD (In-Circuit Debugger Configuration) ............... 254
FOSC (Oscillator Configuration) .............................. 251
FOSCSEL (Oscillator Selection Configuration) ....... 250
FPOR (Reset Configuration) ................................... 253
FWDT (Watchdog Timer Configuration) .................. 252
HLVDCON (High/Low-Voltage Detect Control) ....... 208
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Advance Information
DS33030A-page 327