PIC24FV16KM204 Datasheet, PDF (249/336 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontroller with XLP Technology Data Sheet

PIC24FV16KM204 FAMILY
25.0 SPECIAL FEATURES
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive refer-
ence source. For more information on the
Watchdog Timer, High-Level Device Inte-
gration and Programming Diagnostics,
refer to the individual sections of the
“PIC24F Family Reference Manual”
provided below:
• Section 9. “Watchdog Timer (WDT)”
(DS39697)
• Section 33. “Programming and
Diagnostics” (DS39716)
PIC24FV16KM204 family devices include several
features intended to maximize application flexibility and
reliability, and minimize cost through elimination of
external components. These are:
• Flexible Configuration
• Watchdog Timer (WDT)
• Code Protection
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit Emulation
25.1 Configuration Bits
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’), to select vari-
ous device configurations. These bits are mapped,
starting at program memory location, F80000h. A com-
plete list of Configuration register locations is provided
in Table 25-1. A detailed explanation of the various bit
functions is provided in Register 25-1 through
Register 25-9.
The address, F80000h, is beyond the user program
memory space. In fact, it belongs to the configuration
memory space (800000h-FFFFFFh), which can only be
accessed using Table Reads and Table Writes.
TABLE 25-1: CONFIGURATION REGISTERS
LOCATIONS
Configuration
Register
Address
FBS
FGS
FOSCSEL
FOSC
FWDT
FPOR
FICD
F80000
F80004
F80006
F80008
F8000A
F8000C
F8000E
REGISTER 25-1: FBS: BOOT SEGMENT CONFIGURATION REGISTER
U-0
U-0
U-0
U-0
R/W-1
R/W-1
—
—
—
—
BSS2
BSS1
bit 7
R/W-1
BSS0
R/W-1
BWRP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-4
bit 3-1
bit 0
Unimplemented: Read as ‘0’
BSS<2:0>: Boot Segment Program Flash Code Protection bits
111 = No boot program Flash segment
011 = Reserved
110 = Standard security, boot program Flash segment starts at 200h, ends at 000AFEh
010 = High-security boot program Flash segment starts at 200h, ends at 000AFEh
101 = Standard security, boot program Flash segment starts at 200h, ends at 0015FEh⁽¹⁾
001 = High-security, boot program Flash segment starts at 200h, ends at 0015FEh⁽¹⁾
100 = Reserved
000 = Reserved
BWRP: Boot Segment Program Flash Write Protection bit
1 = Boot segment may be written
0 = Boot segment is write-protected
Note 1: This selection should not be used in PIC24FV08KMXXX devices.
 2013 Microchip Technology Inc.
Advance Information
DS33030A-page 249