PIC24FV16KM204 Datasheet, PDF (230/336 Pages) Microchip Technology – General Purpose, 16-Bit Flash Microcontroller with XLP Technology Data Sheet

PIC24FV16KM204 FAMILY
REGISTER 20-1: DACxCON: DACx CONTROL REGISTER
R/W-0
U-0
R/W-0
R/W-0
R/W-0
U-0
DACEN
—
DACSIDL DACSLP
DACFM
—
bit 15
R/W-0
SRDIS
R/W-0
DACTRIG
bit 8
R/W-0
DACOE
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
DACTSEL4 DACTSEL3 DACTSEL2 DACTSEL1 DACTSEL0 DACREF1
R/W-0
DACREF0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
DACEN: DACx Enable bit
1 = Module is enabled
0 = Module is disabled
Unimplemented: Read as ‘0’
DACSIDL: DACx Stop in Idle Mode bit
1 = Discontinues module operation when device enters Idle mode
0 = Continues module operation in Idle mode
DACSLP: DACx Enable Peripheral During Sleep bit
1 = DACx continues to output the most recent value of DACxDAT during Sleep mode
0 = DACx is powered down in Sleep mode; DACxOUT pin is controlled by the TRISx and LATx bits
DACFM: DACx Data Format Select bit
1 = Data is left-justified (data stored in DACxDAT<15:8>)
0 = Data is right-justified (data stored in DACxDAT<7:0>)
Unimplemented: Read as ‘0’
SRDIS: Soft Reset Disable bit
1 = DACxCON and DACxDAT SFRs reset only on a POR or BOR Reset
0 = DACxCON and DACxDAT SFRs reset on any type of device Reset
DACTRIG: DACx Trigger Input Enable bit
1 = Analog output value updates when the selected (by DACTSEL<4:0>) event occurs
0 = Analog output value updates as soon as DACxDAT is written (DAC Trigger is ignored)
DACOE: DACx Output Enable bit
1 = DACx output pin is enabled and driven on the DACxOUT pin
0 = DACx output pin is disabled, DACx output is available internally to other peripherals only
Note 1: User must also enable Band Gap Buffer 0 (BGBUF0) and set BUFCON<1:0> to ‘00’ to obtain this voltage.
DS33030A-page 230
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