PIC18F2220_07 Datasheet, PDF(63/386 Page) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

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PIC18F2220_07 Datasheet, PDF (63/386 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

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PIC18F2220/2320/4220/4320

5.9.2 SPECIAL FUNCTION REGISTERS

The Special Function Registers (SFRs) are registers

used by the CPU and peripheral modules for controlling

the desired operation of the device. These registers are

implemented as static RAM. A list of these registers is

given in Table 5-1 and Table 5-2.

The SFRs can be classified into two sets: those asso-

ciated with the âcoreâ function and those related to the

peripheral functions. Those registers related to the

âcoreâ are described in this section, while those related

to the operation of the peripheral features are

described in the section of that peripheral feature.

The SFRs are typically distributed among the

peripherals whose functions they control.

The unused SFR locations will be unimplemented and

read as â0âs.

TABLE 5-1: SPECIAL FUNCTION REGISTER MAP FOR PIC18F2X20/4X20 DEVICES

Address

Name

FFFh

TOSU

FFEh

TOSH

FFDh

TOSL

FFCh STKPTR

FFBh PCLATU

FFAh PCLATH

FF9h

PCL

FF8h TBLPTRU

FF7h TBLPTRH

FF6h TBLPTRL

FF5h TABLAT

FF4h PRODH

FF3h PRODL

FF2h INTCON

FF1h INTCON2

FF0h

FEFh

FEEh

FEDh

FECh

FEBh

INTCON3

INDF0(2)

POSTINC0(2)

POSTDEC0(2)

PREINC0(2)

PLUSW0(2)

FEAh FSR0H

FE9h FSR0L

FE8h

FE7h

FE6h

FE5h

FE4h

FE3h

WREG

INDF1(2)

POSTINC1(2)

POSTDEC1(2)

PREINC1(2)

PLUSW1(2)

FE2h FSR1H

FE1h FSR1L

FE0h

BSR

Address

FDFh

FDEh

FDDh

FDCh

FDBh

Name

INDF2(2)

POSTINC2(2)

POSTDEC2(2)

PREINC2(2)

PLUSW2(2)

FDAh FSR2H

FD9h FSR2L

FD8h STATUS

FD7h TMR0H

FD6h TMR0L

FD5h T0CON

FD4h

â

FD3h OSCCON

FD2h LVDCON

FD1h WDTCON

FD0h RCON

FCFh TMR1H

FCEh TMR1L

FCDh T1CON

FCCh

TMR2

FCBh

PR2

FCAh T2CON

FC9h SSPBUF

FC8h SSPADD

FC7h SSPSTAT

FC6h SSPCON1

FC5h SSPCON2

FC4h ADRESH

FC3h ADRESL

FC2h ADCON0

FC1h ADCON1

FC0h ADCON2

Address

Name

FBFh CCPR1H

FBEh CCPR1L

FBDh CCP1CON

FBCh CCPR2H

FBBh CCPR2L

FBAh CCP2CON

FB9h

â

FB8h

FB7h

FB6h

â

PWM1CON(1)

ECCPAS(1)

FB5h CVRCON

FB4h CMCON

FB3h TMR3H

FB2h TMR3L

FB1h T3CON

FB0h

â

FAFh SPBRG

FAEh RCREG

FADh TXREG

FACh TXSTA

FABh RCSTA

FAAh

â

FA9h EEADR

FA8h EEDATA

FA7h EECON2

FA6h EECON1

FA5h

â

FA4h

â

FA3h

â

FA2h

IPR2

FA1h

PIR2

FA0h

PIE2

Address

F9Fh

F9Eh

F9Dh

F9Ch

F9Bh

F9Ah

F99h

F98h

F97h

F96h

F95h

F94h

F93h

F92h

F91h

F90h

F8Fh

F8Eh

F8Dh

F8Ch

F8Bh

F8Ah

F89h

F88h

F87h

F86h

F85h

F84h

F83h

F82h

F81h

F80h

Name

IPR1

PIR1

PIE1

â

OSCTUNE

â

â

â

â

TRISE(1)

TRISD(1)

TRISC

TRISB

TRISA

â

â

â

â

LATE(1)

LATD(1)

LATC

LATB

LATA

â

â

â

â

PORTE

PORTD(1)

PORTC

PORTB

PORTA

Legend: â = Unimplemented registers, read as â0â.

Note 1: This register is not available on PIC18F2X20 devices.

2: This is not a physical register.

Â© 2007 Microchip Technology Inc.

DS39599F-page 61

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