PIC18F2220_07 Datasheet, PDF (338/386 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
FIGURE 26-19: MASTER SSP I²C BUS START/STOP BITS TIMING WAVEFORMS
SCL
SDA
91
90
93
92
Start
Condition
Note: Refer to Figure 26-5 for load conditions.
Stop
Condition
TABLE 26-20: MASTER SSP I²C BUS START/STOP BITS REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
90
TSU:STA Start condition 100 kHz mode 2(TOSC)(BRG + 1) — ns Only relevant for
Setup time
400 kHz mode 2(TOSC)(BRG + 1) —
Repeated Start condition
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
91
THD:STA Start condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns After this period, the first
Hold time
400 kHz mode 2(TOSC)(BRG + 1) —
clock pulse is generated
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
92
TSU:STO Stop condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Setup time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
93
THD:STO Stop condition 100 kHz mode 2(TOSC)(BRG + 1)
—
ns
Hold time
400 kHz mode 2(TOSC)(BRG + 1) —
1 MHz mode⁽¹⁾ 2(TOSC)(BRG + 1)
—
Note 1: Maximum pin capacitance = 10 pF for all I²C pins.
FIGURE 26-20:
SCL
SDA
In
SDA
Out
MASTER SSP I²C BUS DATA TIMING
103
100
101
90
91
106
107
109
109
Note: Refer to Figure 26-5 for load conditions.
102
92
110
DS39599F-page 336
© 2007 Microchip Technology Inc.