PIC18F2220_07 Datasheet, PDF (108/386 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
TABLE 10-3: PORTB FUNCTIONS
Name
Bit#
Buffer
Function
RB0/AN12/INT0
RB1/AN10/INT1
RB2/AN8/INT2
RB3/AN9/CCP2
bit 0 TTL⁽¹⁾/ST⁽²⁾ Input/output pin, analog input or external interrupt input 0.
Internal software programmable weak pull-up.
bit 1 TTL⁽¹⁾/ST⁽²⁾ Input/output pin, analog input or external interrupt input 1.
Internal software programmable weak pull-up.
bit 2 TTL⁽¹⁾/ST⁽²⁾ Input/output pin, analog input or external interrupt input 2.
Internal software programmable weak pull-up.
bit 3 TTL⁽¹⁾/ST⁽³⁾ Input/output pin or analog input. Capture2 input/Compare2 output/
PWM output when CCP2MX configuration bit is set⁽⁴⁾.
Internal software programmable weak pull-up.
RB4/AN11/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB7/KBI3/PGD
bit 4
TTL
Input/output pin (with interrupt-on-change) or analog input.
Internal software programmable weak pull-up.
bit 5 TTL/ST⁽⁵⁾ Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Low-voltage ICSP enable pin.
bit 6 TTL/ST⁽⁵⁾ Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Serial programming clock.
bit 7 TTL/ST⁽⁵⁾ Input/output pin (with interrupt-on-change). Internal software
programmable weak pull-up. Serial programming data.
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1: This buffer is a TTL input when configured as digital I/O.
2: This buffer is a Schmitt Trigger input when configured as the external interrupt.
3: This buffer is a Schmitt Trigger input when configured as the CCP2 input.
4: A device configuration bit selects which I/O pin the CCP2 pin is multiplexed on.
5: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
TABLE 10-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0 xxxq qqqq
LATB
LATB Data Latch Register
xxxx xxxx
TRISB
PORTB Data Direction Register
1111 1111
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x
INTCON2
RBPU INTEDG0 INTEDG1 INTEDG2 —
TMR0IP —
RBIP 1111 -1-1
INTCON3 INT2IP INT1IP
—
INT2IE INT1IE
—
INT2IF INT1IF 11-0 0-00
ADCON1
—
—
VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0 --00 0000
Legend: x = unknown, u = unchanged, q = value depends on condition. Shaded cells are not used by PORTB.
Value on
all other
Resets
uuuu uuuu
uuuu uuuu
1111 1111
0000 000u
1111 -1-1
11-0 0-00
--00 0000
DS39599F-page 106
© 2007 Microchip Technology Inc.