PIC18F2220_07 Datasheet, PDF (49/386 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
TABLE 4-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
FSR1H
FSR1L
2220 2320 4220 4320
2220 2320 4220 4320
---- xxxx
xxxx xxxx
---- uuuu
uuuu uuuu
---- uuuu
uuuu uuuu
BSR
2220 2320 4220 4320 ---- 0000
---- 0000
---- uuuu
INDF2
2220 2320 4220 4320
N/A
N/A
N/A
POSTINC2 2220 2320 4220 4320
N/A
N/A
N/A
POSTDEC2 2220 2320 4220 4320
N/A
N/A
N/A
PREINC2 2220 2320 4220 4320
N/A
N/A
N/A
PLUSW2 2220 2320 4220 4320
N/A
N/A
N/A
FSR2H
FSR2L
STATUS
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
---- xxxx
xxxx xxxx
---x xxxx
---- uuuu
uuuu uuuu
---u uuuu
---- uuuu
uuuu uuuu
---u uuuu
TMR0H
2220 2320 4220 4320 0000 0000
0000 0000
uuuu uuuu
TMR0L
2220 2320 4220 4320 xxxx xxxx
uuuu uuuu
uuuu uuuu
T0CON
2220 2320 4220 4320 1111 1111
1111 1111
uuuu uuuu
OSCCON 2220 2320 4220 4320 0000 q000
0000 q000
uuuu qquu
LVDCON
WDTCON
RCON⁽⁴⁾
TMR1H
TMR1L
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
--00 0101
---- ---0
0--1 11q0
xxxx xxxx
xxxx xxxx
--00 0101
---- ---0
0--q qquu
uuuu uuuu
uuuu uuuu
--uu uuuu
---- ---u
u--u qquu
uuuu uuuu
uuuu uuuu
T1CON
2220 2320 4220 4320 0000 0000
u0uu uuuu
uuuu uuuu
TMR2
2220 2320 4220 4320 0000 0000
0000 0000
uuuu uuuu
PR2
2220 2320 4220 4320 1111 1111
1111 1111
1111 1111
T2CON
2220 2320 4220 4320 -000 0000
-000 0000
-uuu uuuu
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
5:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
See Table 4-2 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
© 2007 Microchip Technology Inc.
DS39599F-page 47