PIC18F2220_07 Datasheet, PDF (16/386 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
TABLE 1-3: PIC18F4220/4320 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin Buffer
PDIP TQFP QFN ^{Type Type}
Description
MCLR/VPP/RE3
MCLR
VPP
RE3
1 18 18
Master Clear (input) or programming voltage (input).
I
ST
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
P
Programming voltage input.
I
ST
Digital input.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
13 30 32
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode, CMOS otherwise.
I CMOS External clock source input. Always associated with
pin function OSC1. (See related OSC1/CLKI,
OSC2/CLKO pins.)
I/O TTL General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
14 31 33
Oscillator crystal or clock output.
O—
Oscillator crystal output. Connects to crystal or resonator
in Crystal Oscillator mode.
O—
In RC mode, OSC2 pin outputs CLKO which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
I/O TTL General purpose I/O pin.
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
2 19 19
I/O TTL Digital I/O.
I Analog Analog input 0.
RA1/AN1
RA1
AN1
3 20 20
I/O TTL Digital I/O.
I Analog Analog input 1.
RA2/AN2/VREF-/CVREF 4
RA2
AN2
VREF-
CVREF
21 21
I/O TTL Digital I/O.
I Analog Analog input 2.
I Analog A/D reference voltage (Low) input.
O Analog Comparator reference voltage output.
RA3/AN3/VREF+
RA3
AN3
VREF+
5 22 22
I/O TTL Digital I/O.
I Analog Analog input 3.
I Analog A/D reference voltage (High) input.
RA4/T0CKI/C1OUT
RA4
T0CKI
C1OUT
6 23 23
I/O ST/OD Digital I/O. Open-drain when configured as output.
I
ST
Timer0 external clock input.
O—
Comparator 1 output.
RA5/AN4/SS/LVDIN/ 7
C2OUT
RA5
AN4
SS
LVDIN
C2OUT
24 24
I/O TTL
I Analog
I TTL
I Analog
O—
Digital I/O.
Analog input 4.
SPI slave select input.
Low-Voltage Detect input.
Comparator 2 output.
RA6
See the OSC2/CLKO/RA6 pin.
RA7
See the OSC1/CLKI/RA7 pin.
Legend:
Note 1:
2:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
OD = Open-drain (no diode to VDD)
CMOS = CMOS compatible input or output
I
= Input
P = Power
Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.
Alternate assignment for CCP2 when CCP2MX is cleared.
DS39599F-page 14
© 2007 Microchip Technology Inc.