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| PIC18F2220_07 Datasheet, PDF (51/386 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology | |||
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PIC18F2220/2320/4220/4320
TABLE 4-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
IPR2
PIR2
2220 2320 4220 4320
2220 2320 4220 4320
11-1 1111
00-0 0000
11-1 1111
00-0 0000
uu-u uuuu
uu-u uuuu(1)
PIE2
2220 2320 4220 4320 00-0 0000
00-0 0000
uu-u uuuu
IPR1
PIR1
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
2220 2320 4220 4320
1111 1111
-111 1111
0000 0000
-000 0000
1111 1111
-111 1111
0000 0000
-000 0000
uuuu uuuu
-uuu uuuu
uuuu uuuu(1)
-uuu uuuu(1)
PIE1
2220 2320 4220 4320
2220 2320 4220 4320
0000 0000
-000 0000
0000 0000
-000 0000
uuuu uuuu
-uuu uuuu
OSCTUNE 2220 2320 4220 4320 --00 0000
--00 0000
--uu uuuu
TRISE
2220 2320 4220 4320 0000 -111
0000 -111
uuuu -uuu
TRISD
2220 2320 4220 4320 1111 1111
1111 1111
uuuu uuuu
TRISC
2220 2320 4220 4320 1111 1111
1111 1111
uuuu uuuu
TRISB
TRISA(5)
2220 2320 4220 4320
2220 2320 4220 4320
1111 1111
1111 1111(5)
1111 1111
1111 1111(5)
uuuu uuuu
uuuu uuuu(5)
LATE
2220 2320 4220 4320 ---- -xxx
---- -uuu
---- -uuu
LATD
2220 2320 4220 4320 xxxx xxxx
uuuu uuuu
uuuu uuuu
LATC
2220 2320 4220 4320 xxxx xxxx
uuuu uuuu
uuuu uuuu
LATB
LATA(5)
2220 2320 4220 4320
2220 2320 4220 4320
xxxx xxxx
xxxx xxxx(5)
uuuu uuuu
uuuu uuuu(5)
uuuu uuuu
uuuu uuuu(5)
PORTE
2220 2320 4220 4320 ---- xxxx
---- xxxx
---- uuuu
PORTD
2220 2320 4220 4320 xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTC
2220 2320 4220 4320 xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTB
PORTA(5)
2220 2320 4220 4320
2220 2320 4220 4320
xxxx xxxx
xx0x 0000(5)
uuuu uuuu
uu0u 0000(5)
uuuu uuuu
uuuu uuuu(5)
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-2 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read â0â.
© 2007 Microchip Technology Inc.
DS39599F-page 49
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