PIC18F2220_07 Datasheet, PDF (13/386 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2220/2320/4220/4320
TABLE 1-2: PIC18F2220/2320 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number _{Pin Buffer}
PDIP SOIC ^{Type Type}
Description
MCLR/VPP/RE3
MCLR
VPP
RE3
11
Master Clear (input) or programming voltage (input).
I
ST
Master Clear (Reset) input. This pin is an active-low Reset
to the device.
P
Programming voltage input.
I
ST
Digital input.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
99
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode, CMOS otherwise.
I CMOS External clock source input. Always associated with pin
function OSC1. (See related OSC1/CLKI, OSC2/CLKO pins.)
I/O TTL
General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
10 10
Oscillator crystal or clock output.
O
—
Oscillator crystal output. Connects to crystal or resonator
in Crystal Oscillator mode.
O
—
In RC mode, OSC2 pin outputs CLKO which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
I/O TTL
General purpose I/O pin.
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
22
I/O TTL
Digital I/O.
I Analog Analog input 0.
RA1/AN1
RA1
AN1
33
I/O TTL
Digital I/O.
I Analog Analog input 1.
RA2/AN2/VREF-/CVREF
RA2
AN2
VREF-
CVREF
44
I/O TTL
Digital I/O.
I Analog Analog input 2.
I Analog A/D Reference Voltage (Low) input.
O Analog Comparator Reference Voltage output.
RA3/AN3/VREF+
RA3
AN3
VREF+
55
I/O TTL
Digital I/O.
I Analog Analog input 3.
I Analog A/D Reference Voltage (High) input.
RA4/T0CKI/C1OUT
RA4
T0CKI
C1OUT
66
I/O ST/OD Digital I/O. Open-drain when configured as output.
I
ST
Timer0 external clock input.
O
—
Comparator 1 output.
RA5/AN4/SS/LVDIN/C2OUT 7
RA5
AN4
SS
LVDIN
C2OUT
7
I/O TTL
Digital I/O.
I Analog Analog input 4.
I TTL
SPI Slave Select input.
I Analog Low-Voltage Detect input.
O
—
Comparator 2 output.
RA6
See the OSC2/CLKO/RA6 pin.
RA7
See the OSC1/CLKI/RA7 pin.
Legend:
Note 1:
2:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
OD = Open-drain (no diode to VDD)
CMOS = CMOS compatible input or output
I
= Input
P = Power
Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set.
Alternate assignment for CCP2 when CCP2MX is cleared.
© 2007 Microchip Technology Inc.
DS39599F-page 11