PIC18F2220_07 Datasheet, PDF(50/386 Page) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

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PIC18F2220_07 Datasheet, PDF (50/386 Pages) Microchip Technology – 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

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PIC18F2220/2320/4220/4320

TABLE 4-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

ADRESH 2220 2320 4220 4320 xxxx xxxx

uuuu uuuu

uuuu uuuu

ADRESL 2220 2320 4220 4320 xxxx xxxx

uuuu uuuu

uuuu uuuu

ADCON0 2220 2320 4220 4320 --00 0000

--00 0000

--uu uuuu

ADCON1 2220 2320 4220 4320 --00 0000

--00 0000

--uu uuuu

ADCON2 2220 2320 4220 4320 0-00 0000

0-00 0000

u-uu uuuu

CCPR1H 2220 2320 4220 4320 xxxx xxxx

uuuu uuuu

uuuu uuuu

CCPR1L 2220 2320 4220 4320 xxxx xxxx

uuuu uuuu

uuuu uuuu

2220 2320 4220 4320

CCP1CON

2220 2320 4220 4320

0000 0000

--00 0000

0000 0000

--00 0000

uuuu uuuu

--uu uuuu

CCPR2H 2220 2320 4220 4320 xxxx xxxx

uuuu uuuu

uuuu uuuu

CCPR2L 2220 2320 4220 4320 xxxx xxxx

uuuu uuuu

uuuu uuuu

CCP2CON 2220 2320 4220 4320 --00 0000

--00 0000

--uu uuuu

PWM1CON 2220 2320 4220 4320 0000 0000

0000 0000

uuuu uuuu

ECCPAS 2220 2320 4220 4320 0000 0000

0000 0000

uuuu uuuu

CVRCON 2220 2320 4220 4320 000- 0000

000- 0000

uuu- uuuu

CMCON 2220 2320 4220 4320 0000 0111

0000 0111

uuuu uuuu

TMR3H

2220 2320 4220 4320 xxxx xxxx

uuuu uuuu

uuuu uuuu

TMR3L

2220 2320 4220 4320 xxxx xxxx

uuuu uuuu

uuuu uuuu

T3CON

2220 2320 4220 4320 0000 0000

uuuu uuuu

uuuu uuuu

SPBRG

2220 2320 4220 4320 0000 0000

0000 0000

uuuu uuuu

RCREG

2220 2320 4220 4320 0000 0000

0000 0000

uuuu uuuu

TXREG

2220 2320 4220 4320 0000 0000

0000 0000

uuuu uuuu

TXSTA

2220 2320 4220 4320 0000 -010

0000 -010

uuuu -uuu

RCSTA

2220 2320 4220 4320 0000 000x

0000 000x

uuuu uuuu

EEADR

2220 2320 4220 4320 0000 0000

0000 0000

uuuu uuuu

EEDATA 2220 2320 4220 4320 0000 0000

0000 0000

uuuu uuuu

EECON1 2220 2320 4220 4320 xx-0 x000

uu-0 u000

uu-0 u000

EECON2 2220 2320 4220 4320 0000 0000

0000 0000

0000 0000

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

4: See Table 4-2 for Reset value for specific condition.

5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When

not enabled as PORTA pins, they are disabled and read â0â.

DS39599F-page 48

Â© 2007 Microchip Technology Inc.

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