LAN8810 Datasheet, PDF (49/83 Pages) Microchip Technology – GMII 10/100/1000 Ethernet Transceiver

LAN8810/LAN8810I
Note 4-7
The default mode is determined by the CONFIG[3:2] pins as described in Section 3.8.1.2.2,
"Configuring the Mode of Operation (CONFIG[3:2])," on page 26
4.2.17 ADVANCED REGISTER ADDRESS PORT
Index (In Decimal): 20
Size:
16 bits
Bits
Description
15 Read
When this bit is set to 1, the contents of the advanced register selected by
the Register Address field are latched to the Advanced Register Read Data
Port. This bit is self-cleared.
14:7 RESERVED
Must be written with 00000011b for proper operation.
The values of RESERVED bits are not guaranteed on a read.
6:0 Register Address
The address of the Advanced Register being accessed (0-12).
Type
SC
R/W
RO
Default
0b
-
0000000b
Note: Refer to Section 4.3, "Advanced PHY Registers," on page 53 for additional information on the advanced
register set.
4.2.18 ADVANCED REGISTER READ DATA PORT
Index (In Decimal): 21
Size:
16 bits
Bits
Description
15:0 Read
Data read from the Advanced Register selected via the Advanced Register
Address Port.
Type
RO
Default
0000h
Note: Refer to Section 4.3, "Advanced PHY Registers," on page 53 for additional information on the advanced
register set.
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DS00001870B-page 48