80C286_08 Datasheet, PDF (8/60 Pages) Intersil Corporation – High Performance Microprocessor with Memory Management and Protection

80C286
STATUS FLAGS:
CARRY
PARITY
AUXILIARY CARRY
ZERO
SIGN
OVERFLOW
15
14
13
12
11 10
9
8
7
65
FLAGS:
NT
IOPL
OF DF IF
TF
SF
ZF
43
AF
21
0
PF
CF
15
MSW:
CONTROL FLAGS:
TRAP FLAG
INTERRUPT ENABLE
DIRECTION FLAG
SPECIAL FIELDS:
I/O PRIVILEGE LEVEL
NESTED TASK FLAG
3
2
1
0
TS EM MP PE
RESERVED
TASK SWITCH
PROCESSOR EXTENSION EMULATED
MONITOR PROCESSOR EXTENSION
PROTECTION ENABLE
FIGURE 2. STATUS AND CONTROL REGISTER BIT FUNCTIONS
BIT POSITION
0
2
4
6
7
11
8
9
10
NAME
CF
PF
AF
ZF
SF
OF
TF
IF
DF
TABLE 1. FLAGS WORD BIT FUNCTIONS
FUNCTION
Carry Flag - Set on high-order bit carry or borrow; cleared otherwise.
Parity Flag - Set if low-order 8 bits of result contain an even number of 1 bits; cleared otherwise.
Set on carry from or borrow to the low order four bits of AL; cleared otherwise.
Zero Flag - Set if result is zero; cleared otherwise.
Sign Flag - Set equal to high-order bit of result (0 if positive, 1 if negative).
Overflow Flag - Set if result is a too-large positive number or a too-small negative number (excluding
sign-bit) to fit in destination operand; cleared otherwise.
Single Step Flag - Once set, a single step interrupt occurs after the next instruction executes. TF is
cleared by the single step interrupt.
Interrupt-Enable Flag - When set, maskable interrupts will cause the CPU to transfer control to an inter-
rupt vector specified location.
Direction Flag - Causes string instructions to auto decrement the appropriate index registers when set.
Clearing DF causes auto increment.
8