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80C286_08 Datasheet, PDF (3/60 Pages) Intersil Corporation – High Performance Microprocessor with Memory Management and Protection
80C286
Pinouts (Continued)
68 LEAD PLCC
P.C. Board View - As viewed from the component side of the P.C. board.
PIN 1 INDICATOR
68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52
BHE 1
NC 2
NC 3
S1 4
S0 5
PEACK 6
A23 7
A22 8
VSS 9
A21 10
A20 11
A19 12
A18 13
A17 14
A16 15
A15 16
A14 17
51 D15
50 D7
49 D14
48 D6
47 D13
46 D5
45 D12
44 D4
43 D11
42 D3
41 D10
40 D2
39 D9
38 D1
37 D8
36 D0
35 VSS
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
MOLD MARK DOES NOT
INDICATE PIN 1
Functional Diagram
ADDRESS UNIT (AU)
OFFSET
ADDER
SEGMENT
BASES
SEGMENT
LIMIT SEGMENT
CHECKER SIZES
PHYSICAL
ADDRESS
ADDER
ALU
ADDRESS
LATCHES AND DRIVERS
PRE-
FETCHER
PROCESSOR
EXTENSION
INTERFACE
BUS CONTROL
DATA TRANSCEIVERS
6-BYTE
PREFETCH
QUEUE
BUS UNIT (BU)
REGISTERS CONTROL
EXECUTION UNIT (EU)
3 DECODED
INSTRUCTION
QUEUE
INSTRUCTION
DECODER
INSTRUCTION
UNIT (IU)
NMI
BUSY
INTR ERROR
A23 - A0,
BHE, M/IO
PEACK
PEREQ
READY,
HOLD,
S1, S0,
COD/INTA,
LOCK, HLDA
D15 - D0
RESET
CLK
VSS
VCC
3