GW80314GSSL7NK Datasheet, PDF (80/88 Pages) Intel Corporation – Intel® GW80314 I/O Companion Chip

Intel® GW80314 I/O Companion Chip
Electrical Specifications
4.4.8
I²C Interface Signal Timings
Table 39 lists the AC specifications for GW80314 I²C interfaces. The specifications are valid for
both the GPIO I²C interface and the I²C interface contained within the DDR SDRAM controller.
Table 39. AC Specifications for I²C Interface
Symbol
Parameter
F_SCL
T_BUF
T_HDSTA
T_LOW
T_HIGH
T_SUSTA
T_HDDAT
T_SUDAT
T_SR
SD_I2C_CLK/I2C_SCLK Clock Frequency
Bus Free Time Between STOP and START Condition
Hold Time (repeated) START condition
SD_I2C_CLK/I2C_SCLK Clock Low Time
SD_I2C_CLK/I2C_SCLK Clock High Time
Setup Time for a Repeated START condition
Data Hold Time
Data Setup Time
SD_I2C_CLK, SD_I2C_SDA, I2C_SCLK, and I2C_SDA
Rise Time
T_SF
SD_I2C_CLK, SD_I2C_SDA, I2C_SCLK, and I2C_SDA
Fall Time
T_SUSTO Setup Time for STOP Condition
NOTES:
1. See Figure 11.
2. Not tested.
3. After this period, the first clock pulse in generated.
Std. Mode
Min.
0
4.7
4
4.7
4
4.7
0
250
-
Max.
100
-
-
-
-
-
3.45
-
1000
-
300
4
-
Units
KHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
Notes
1
1,3
1,2
1,2
1
1
1
1
1
1
80
Datasheet