GW80314GSSL7NK Datasheet, PDF (40/88 Pages) Intel Corporation – Intel® GW80314 I/O Companion Chip

Intel® GW80314 I/O Companion Chip
Package Information
Table 19. Signal Pin Mode Behavior (Sheet 7 of 7)
Pin Name
Reset
Norm
SF_RST#
VI
VI
TCK
VI
VI
TMS
H
H
TDI
H
H
TDO
Z
VO
TRST#
H
H
NOTES:
1. 1 = driven to V_CC
2. Z = output disabled (floats)
3. 0 = driven to V_SS
4. VB = acts like a valid bidirectional pin
5. ID = input is disabled
6. VO = a valid output level is driven
7. VO_M = a valid output level is driven (PCI Master)
8. VO_T = a valid output level is driven (PCI Target)
9. H = pulled up to V_CC
10.L = pulled down to V_SS
11. VI = need to drive a valid input level
12.VI_M = need to drive a valid input level (PCI Master)
13.VI_T = need to drive a valid input level (PCI Target)
14.PD = pull-up disabled
15.* = after power fail sequence completes
Hold
–
–
–
–
–
–
32-Bit PCI 32-Bit Mem
–
–
–
–
–
–
–
–
–
–
–
–
ECC Off
–
–
–
–
–
–
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