GW80314GSSL7NK Datasheet, PDF (29/88 Pages) Intel Corporation – Intel® GW80314 I/O Companion Chip

Intel® GW80314 I/O Companion Chip
Package Information
3.1.8
P1 Hot Swap Signals
This section describes the GW80314 PCI Port 1 Hot Swap signals.
Table 10. P1 Hot Swap Signals
Pin Name
P1_ENUM#
P1_ES
P1_HEALTHY#
P1_HS_64EN#
P1_LED#
P1 Hot Swap Pin Count
Count
1
1
1
1
1
5
Pin Type
Description
IO(OD)
I
I
I
OD
System Enumeration: Used to notify system host that a board has been
freshly inserted or extracted from the system.
Ejector Switch: Indicates the status of Hot Swap board ejector switch.
Board healthy - In a CPCI Hot Swap environment, indicates the board is ready
to be released from reset and become an active agent on the PCI bus.
Negation of P1_HEALTHY# resets all GW80314 resources, including PLLs.
Additionally, all GW80314 outputs are tristated when this pin is negated; some
inputs and bidirectionals are inhibited.
PCI/X 64-bit Enable: An active low indication that a CompactPCI Hot Swap
board is in a 64-bit slot.
LED: Controls the Hot Swap status LED.
3.1.9
P2 Hot Swap Signals
This section describes the GW80314 PCI Port 2 Hot Swap signals.
Table 11. P2 Hot Swap Signals
Pin Name
P2_ENUM#
P2_ES
P2_HEALTHY#
P2_HS_64EN#
P2_LED#
P2 Hot Swap Pin Count
Count
1
1
1
1
1
5
Pin Type
Description
IO(OD)
I
I
I
O
System Enumeration: Used to notify system host that a board has been
freshly inserted or extracted from the system.
Ejector Switch: Indicates the status of Hot Swap board ejector switch.
Board healthy - In a CPCI Hot Swap environment, indicates the board is ready
to be released from reset and become an active agent on the PCI bus.
Negation of P1_HEALTHY# resets all GW80314 resources, including PLLs.
Additionally, all GW80314 outputs are tristated when this pin is negated; some
inputs and bidirectionals are inhibited.
PCI/X 64-bit Enable: An active low indication that a CompactPCI Hot Swap
board is in a 64-bit slot.
LED: Controls the Hot Swap status LED.
3.1.10
Interrupt Controller Signals
This section describes signals for the GW80314 interrupt controller. Signals in this group are 3.3 V
LVTTL compatible.
Table 12. Interrupt Controller Signals
Pin Name
INT[15:8]
INT[7:0]
Interrupt Total
Count
8
8
16
Pin Type
Description
IO Inputs representing external, incoming interrupts.
I
Inputs representing external, incoming interrupts.
Datasheet
29