GW80314GSSL7NK Datasheet, PDF (37/88 Pages) Intel Corporation – Intel® GW80314 I/O Companion Chip

Intel® GW80314 I/O Companion Chip
Package Information
Table 19. Signal Pin Mode Behavior (Sheet 4 of 7)
Pin Name
Reset
Norm
P1_PAR64
Z
P1_PCIXCAP[1:0]
VI
P1_PERR#
Z
P1_PME#
Z
P1_REQ#[1]
Z
P1_REQ#[7:2]
VI
P1_REQ64#
P1_RST#
VO_M/VI_T
VB
P1_RSTDIR
VI
P1_SERR#
Z
P1_STOP#
P1_TRDY#
P2_ACK64#
VO_T/VI_M
VO_T/VI_M
Z
P2_AD[63:32]
Z
P2_AD[31:0]
Z
P2_CBE#[7:4]
Z
P2_CBE#[3:0
Z
P2_CLK_IN
VI
P2_CLK_OUT
0
P2_DEVSEL#
Z
P2_FRAME#
Z
P2_GNT#[1]
Z
P2_GNT#[7:2]
Z
P2_IDSEL
VI
P2_INTA#
Z
P2_INTB#
Z
P2_INTC#
Z
P2_INTD#
Z
P2_IRDY#
Z
P2_M66EN
VI
NOTES:
1. 1 = driven to V_CC
2. Z = output disabled (floats)
3. 0 = driven to V_SS
4. VB = acts like a valid bidirectional pin
5. ID = input is disabled
6. VO = a valid output level is driven
7. VO_M = a valid output level is driven (PCI Master)
8. VO_T = a valid output level is driven (PCI Target)
9. H = pulled up to V_CC
10.L = pulled down to V_SS
11. VI = need to drive a valid input level
12.VI_M = need to drive a valid input level (PCI Master)
13.VI_T = need to drive a valid input level (PCI Target)
14.PD = pull-up disabled
15.* = after power fail sequence completes
VB
VI
VB
VB
VB
VI
VO_M/VI_T
VB
VI
VB
VO_T/VI_M
VO_T/VI_M
VB
VB
VB
VB
VB
VI
VO
VB
VB
VB
VO
VI
VO
VO
VO
VO
VB
VI
Hold
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
32-Bit PCI 32-Bit Mem
H
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
H
–
–
–
H
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
ECC Off
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Datasheet
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