82433LX Datasheet, PDF (8/53 Pages) Intel Corporation – LOCAL BUS ACCELERATOR (LBX)

82433LX 82433NX
1 4 PCI TRDY Interface
The PCI control signals do not interface to the LBXs
instead these signals connect to the 82434LX
PCMC component The main function of the LBXs
PCI interface is to drive address and data onto PCI
when the CPU targets PCI and to latch address and
data when a PCI master targets main memory
The TRDY option provides the capability for zero-
wait state performance on PCI when the Pentium
processor performs sequential writes to PCI This
option requires that PCI TRDY be connected to
each LBX for a total of two additional connections in
the system These two TRDY connections are in
addition to the single TRDY connection that the
PCMC requires
1 5 Parity Support
The LBXs support byte parity on the host bus (CPU
and second level cache) and main memory buses
(local DRAM) The LBXs support parity during the
address and data phases of PCI transactions to
from the host bridge
2 0 SIGNAL DESCRIPTIONS
This section provides a detailed description of each
signal The signals (Figure 3) are arranged in func-
tional groups according to their associated interface
The ‘ ’ symbol at the end of a signal name indicates
that the active or asserted state occurs when the
signal is at a low voltage level When ‘ ’ is not pres-
ent after the signal name the signal is asserted
when at the high voltage level
The terms assertion and negation are used exten-
sively This is done to avoid confusion when working
with a mixture of ‘active-low’ and ‘active-high’ sig-
nals The term assert or assertion indicates that a
signal is active independent of whether that level is
represented by a high or low voltage The term ne-
gate or negation indicates that a signal is inactive
The following notations are used to describe the sig-
nal type
in Input is a standard input-only signal
out Totem Pole output is a standard active driver
t s Tri-State is a bi-directional tri-state input out-
put pin
Figure 3 LBX Signals
290478 – 4
8