82433LX Datasheet, PDF (40/53 Pages) Intel Corporation – LOCAL BUS ACCELERATOR (LBX)

82433LX 82433NX
4 4 7 TEST TIMING (82433LX)
Functional Operating Range V_CC ^e 4 75V to 5 25V T_CASE ^e 0 C to ^a85 C
Symbol
Parameter
Min
Max
Figure
Notes
t30
All Test Signals Setup Time to
10 0
HCLK PCLK Rising
In PLL Bypass
Mode
t31
All Test Signals Hold Time to
12 0
HCLK PCLK Rising
In PLL Bypass
Mode
t32
Test Setup Time to HCLK PCLK Rising 15 0
15
t33
Test Hold Time to HCLK PCLK Rising
50
15
t34
PPOUT Valid Delay from PCLK Rising
00
500
15
In PLL Bypass
Mode
4 5 82433NX AC Characteristics
The AC specifications given in this section consist of propagation delays valid delays input setup require-
ments input hold requirements output float delays output enable delays clock high and low times and clock
period specifications Figure 13 through Figure 21 define these specifications Section 4 5 lists the AC Specifi-
cations
In Figure 13 through Figure 21 VT ^e 1 5V for the following signals MD 31 0 MP 3 0 D 31 0 HP 3 0
A 15 0 AD 15 0 TRDY HCLK PCLK RESET TEST
VT ^e 2 5V for the following signals HIG 4 0 PIG 3 0 MIG 2 0 MDLE DRVPCI PPOUT EOL
4 5 1 HOST AND PCI CLOCK TIMING (82433NX)
Functional Operating Range V_CC ^e 4 75V to 5 25V V_CC3 ^e 3 135V to 3 465V T_CASE ^e 0 C to ^a85 C
Symbol
Parameter
Min
Max
Figure
Notes
t1a
HCLK Period
15
20
18
t1b
HCLK High Time
5
18
t1c
HCLK Low Time
5
18
t1d
HCLK Rise Time
15
19
t1e
HCLK Fall Time
15
19
t1f
HCLK Period Stability
g100
ps¹
t2a
PCLK Period
30
18
t2b
PCLK High Time
12
18
t2c
PCLK Low Time
12
18
t2d
PCLK Rise Time
3
19
t2e
PCLK Fall Time
3
19
t3
HCLK to PCLK Skew
b_{7 2}
58
21
NOTE
1 Measured on rising edge of adjacent clocks at 1 5 Volts
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