X9000 Datasheet, PDF (22/77 Pages) Intel Corporation – Core2 Duo Processor and Core2 Extreme Processor on 45-nm Process

Low Power Features
2.4.2
Note:
2.5
2.6
but at half the frequency. After a downward shift, it would appear externally as if the
bus is running with a 100-MHz base clock in all aspects except that the actual external
BCLK remains at 200 MHz. The transition into Super LFM, a “down-shift,” is done
following a handshake between the processor and (G)MCH. A similar handshake is used
to indicate an “up-shift,” a change back to normal operating mode. Ensure this feature
is enabled and supported in the BIOS.
Intel® Dynamic Acceleration Technology
The processor supports the Intel Dynamic Acceleration Technology mode. The Intel
Dynamic Acceleration Technology feature allows one core of the processor to operate at
a higher frequency point when the other core is inactive and the operating system
requests increased performance. This higher frequency is called the “opportunistic
frequency” and the maximum rated operating frequency is the “guaranteed frequency.”
Extreme Edition processors do not support Intel Dynamic Acceleration Technology.
Intel Dynamic Acceleration Technology mode enabling requires:
• Exposure, via BIOS, of the opportunistic frequency as the highest ACPI P state
• Enhanced Multi-Threaded Thermal Management (EMTTM)
• Intel Dynamic Acceleration Technology mode and EMTTM MSR configuration via
BIOS.
When in Intel Dynamic Acceleration Technology mode, it is possible for both cores to be
active under certain internal conditions. In such a scenario the processor may draw an
Instantaneous current (I_{CC_CORE_INST}) for a short duration of t_INST; however, the average
I_CC current will be “lesser then” or “equal” to I_CCDES current specification. Please refer
to the Processor DC Specifications section for more details.
VID-x
The processor implements the VID-x feature for improved control of core voltage levels
when the processor enters a reduced power consumption state. VID-x applies only
when the processor is in the Intel Dynamic Acceleration Technology performance state
and one or more cores are in low-power state (i.e., CC3/CC4/CC6). VID-x provides the
ability for the processor to request core voltage level reductions greater than one VID
tick. The amount of VID tick reduction is fixed and only occurs while the processor is in
the Intel Dynamic Acceleration Technology mode. This improved voltage regulator
efficiency, during periods of reduced power consumption, allows for leakage reduction
that results in platform power savings and extended battery life.
Processor Power Status Indicator (PSI-2) Signal
The processor incorporates the PSI# signal that is asserted when the processor is in a
reduced power consumption state. PSI# can be used to improve intermediate and light
load efficiency of the voltage regulator, resulting in platform power savings and
extended battery life. The algorithm that the processor uses for determining when to
assert PSI# is different from the algorithm used in previous mobile processors. For
details, refer to the platform design guide for PSI-2. Functionality is expanded further
to support three processor states when:
• Both cores are in idle state.
• Only one core is in active state.
• Both cores are in active state.
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Datasheet