IA80C152_10 Datasheet, PDF (17/61 Pages) InnovASIC, Inc – Universal Communications Controller

IA80C152
Universal Communications Controller
Data Sheet
July 29, 2010
2.2 I/O Signal Description
Table 6 below describes the I/O characteristics for each signal on the IC. The signal names
correspond to the signal names on the pinout diagrams provided above. The (n) denotes active
low.
Table 6. I/O Signal Descriptions
Signal Name
EAn
EPSENn
PSENn
RESETn
ALE
EBEN
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
Description
External Access enable. Since there is no internal ROM in the IA80C152,
this signal has no function in the JA and JC versions and should be set to 0.
For the JB and JD versions with EBEN, it controls program memory fetches
from ports 0, 2 or ports 5, 6. See Table 3.
E-bus Program Store ENable. When EBEN is 1, this signal is the read
strobe for external program memory. JB/JD versions only.
Program Store ENable. When EBEN is 0, this signal is the read strobe for
external program memory.
Reset. When this signal is low for 3 machine cycles, the device is put into
reset. The GSC may continue transmitting after reset is applied. An
internal pull-up allows the use of an external capacitor to generate a power-
on reset.
Address Latch Enable. Latches the low-byte of external memory.
E-Bus ENable. In conjunction with EAn, EBEN designates program
memory fetches from either Port 0,2 or Port 5,6. See Table 3.
Port 0 - open drain 8-bit bi-directional port that is bit addressable and can
drive up to 8 LS TTL inputs. The port signals can be used as high
impedance inputs.
This port also provides the low-byte of the multiplexed address and data
bus depending on the state of EBEN.
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