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ICS1893 Datasheet, PDF (92/152 Pages) Integrated Circuit Systems – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™ | |||
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ICS1893 Data Sheet - Release
Chapter 8 Management Register Set
8.12.1 Data Rate (bit 17.15)
The Data Rate bit indicates the âselected technologyâ. If the ICS1893 is in:
⢠Hardware mode, the value of this bit is determined by the 10/100SEL input pin.
⢠Software mode, the value of this bit is determined by the Data Rate bit 0.13.
When bit 17.15 is logic:
⢠Zero, it indicates that 10-MHz operations are selected.
⢠One, the ICS1893 is indicating that 100-MHz operations are selected.
Note: This bit does not imply any link status.
8.12.2 Duplex (bit 17.14)
The Duplex bit indicates the âselected technologyâ. If the ICS1893 is in:
⢠Hardware mode, the value of this bit is determined by the DPXSEL input pin.
⢠Software mode, the value of this bit is determined by the Duplex Mode bit 0.8.
When bit 17.14 is logic:
⢠Zero, it indicates that half-duplex operations are selected.
⢠One, the ICS1893 is indicating that full-duplex operations are selected.
Note: This bit does not imply any link status.
ICS1893 Rev C 6/6/00
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
92
June, 2000
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