ICS1893 Datasheet, PDF (134/152 Pages) Integrated Circuit Systems – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893 Data Sheet - Release
Chapter 10 DC and AC Operating Conditions
10.5.8 10M Serial Interface: Receive Latency
Table 10-15 lists the significant time periods for the 10M Serial Interface timing. The time periods consist of
timings of signals on the following pins:
• TP_RX (the MDI mapping of the 10M/100M MII TP_RXP and TP_RXN pins)
• 10RCLK (the 10M Serial Interface mapping of the 10M/100M MII RXCLK pins)
• 10RD (the 10M Serial Interface mapping of the 10M/100M MII RXD0 pins)
Figure 10-9 shows the timing diagram for the time periods.
Table 10-15. 10M Serial Interface Receive Latency Timing
Time
Period
Parameter
t1 TP_RX Input to 10RD Delay
Conditions
Min. Typ. Max. Units
10M Serial Interface – 3.6 4 Bit times
Figure 10-9. 10M Serial Interface Receive Latency Timing
TP_RX
10RCLK
10RD
Bit A
Bit B
Bit A
Bit B
t1
ICS1893 Rev C 6/6/00
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
134
June, 2000