ICS1893 Datasheet, PDF (136/152 Pages) Integrated Circuit Systems – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893 Data Sheet - Release
Chapter 10 DC and AC Operating Conditions
10.5.10 10M Serial Interface: Transmit Latency
Table 10-17 lists the significant time periods for the 10M Serial Interface transmit latency. The time periods
consist of timings of signals on the following pins:
• 10TXEN (the 10M Serial Interface mapping of the 10M/100M MII TXEN pins)
• 10TCLK (the 10M Serial Interface mapping of the 10M/100M MII TXCLK pins)
• 10TD (the 10M Serial Interface mapping of the 10M/100M MII TXD0 pins)
• TP_TX (the MDI mapping of the 10M/100M MII TP_TXP and TP_TXN pins)
Figure 10-11 shows the timing diagram for the time periods.
Table 10-17. 10M Serial Interface Transmit Latency Timing
Time
Period
Parameter
t1 10TD Into TP_TX Out Delay
Conditions
Min. Typ. Max. Units
10M Serial Interface – 0.8 1 Bit times
Figure 10-11. 10M Serial Interface Transmit Latency Timing Diagram
10TXEN
10TCLK
10TD
(MDI)
P[3:0]TP_TX
Bit A
Bit B
t1
Bit A
Bit B
ICS1893 Rev C 6/6/00
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
136
June, 2000