ICS1893 Datasheet, PDF (31/152 Pages) Integrated Circuit Systems – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893 - Release
Chapter 6 Interface Overviews
6.4 Serial Management Interface
The ICS1893 provides an ISO/IEC compliant, two-wire Serial Management Interface as part of its
MAC/Repeater Interface. This Serial Management Interface is used to exchange control, status, and
configuration information between a Station Management entity (STA) and the physical layer device (PHY),
that is, the ICS1893.
The ISO/IEC standard also specifies a frame structure and protocol for this interface as well as a set of
Management Registers that provide the STA with access to a PHY such as the ICS1893. A Serial
Management Interface is comprised of two signals: a bi-directional data pin (MDIO) along with an
associated input pin for a clock (MDC). The clock is used to synchronize all data transfers between the
ICS1893 and the STA.
In addition to the ISO/IEC defined registers, the ICS1893 provides several extended status and control
registers to provide more refined control of the MII and MDI interfaces. For example, the QuickPoll Detailed
Status Register provides the ability to acquire the most-important status functions with a single MDIO read.
Note: In the ICS1893, the MDIO and MDC pins remain active for all the MAC/Repeater Interface modes
(that is, 10M MII, 100M MII, 100M Symbol, and 10M Serial).
6.5 Twisted-Pair Interface
For the twisted-pair interface, the ICS1893 uses 1:1 ratio transformers for both transmit and receive.
Better operation results from using a split ground plane through the transformer. In this case:
• The RJ-45 transformer windings must be on the chassis ground plane along with the Bob Smith
termination.
• The ICS1893 system ground plane must include the ICS1893-side transformer windings along with the
61.9Ω resistors and the 120-nH inductor.
• The transformer provides the isolation with one set of windings on one ground plane and another set of
windings on the second ground plane.
ICS1893 Rev C 6/6/00
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
31
June, 2000