ICS1893 Datasheet, PDF (140/152 Pages) Integrated Circuit Systems – 3.3-V 10Base-T/100Base-TX Integrated PHYceiver™

ICS1893 Data Sheet - Release
Chapter 10 DC and AC Operating Conditions
10.5.14 10M MII: Carrier Assertion/De-Assertion (Half-Duplex Transmission)
Table 10-21 lists the significant time periods for the 10M MII carrier assertion/de-assertion during
half-duplex transmission. The time periods consist of timings of signals on the following pins:
• TXEN
• TXCLK
• CRS
Figure 10-15 shows the timing diagram for the time periods.
Table 10-21. 10M MII Carrier Assertion/De-Assertion (Half-Duplex Transmission Only)
Time
Period
Parameter
t1 TXEN Asserted to CRS Assert
t2 TXEN De-Asserted to CRS De-Asserted
Condi- Min.
tions
0
0
Typ.
–
2
Max. Units
2 Bit times
4 Bit times
Figure 10-15. 10M MII Carrier Assertion/De-Assertion Timing Diagram
(Half-Duplex Transmission Only)
t2
TXEN
TXCLK
CRS
t1
ICS1893 Rev C 6/6/00
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
140
June, 2000